DocumentCode
2096607
Title
Junction engineering and modeling for advanced CMOS technologies
Author
Wang, C.C. ; Huang, T.Y. ; Diaz, Carlos H.
Author_Institution
Adv. Device Technol. Dept., R&D, Taiwan Semicond. Manuf. Co., Hsin-Chu, Taiwan
fYear
2003
fDate
3-5 Sept. 2003
Firstpage
255
Lastpage
258
Abstract
This paper discusses an integrated modeling approach for diffusion profiles in advanced CMOS technologies. First, for USJ (Ultra-Shallow Junction) arsenic modeling, in addition to a fully-coupled model with implant damage, amorphous layer formation which depends on the Frenkel pair concentration and evolution of (311) defects and dislocation loops based on EOR (End of Range) defects are also used. Secondly, in order to improve polysilicon activation, a hybrid (arsenic + phosphorus) Source/Drain is used for NMOS. We also address the calibration of the hybrid Source/Drain for with various anneal temperatures. It is shown that modeling of the hybrid Source/Drain profile can be achieved by optimization of the dopant´s Fermi level dependent diffusivity and the initial value of the point defect concentration in the equilibrium state. Finally, uphill diffusion at low anneal temperature is observed for BF2 USJ and is enhanced with Ge pre-implants. It is caused by a steep interstitial gradient created by preamorphisation and EOR damage, ultra-shallow boron profile, and boron long-hop diffusion. A BIC (Boron-Interstitial Cluster) model is employed to model boron diffusion after a spike RTA at both extension and S/D regions.
Keywords
CMOS integrated circuits; Fermi level; Frenkel defects; amorphisation; annealing; arsenic; boron; calibration; diffusion; dislocation loops; doping profiles; elemental semiconductors; integrated circuit modelling; interstitials; ion-surface impact; phosphorus; semiconductor junctions; silicon; CMOS technologies; EOR damage; Fermi level; Frenkel pair concentration; Ge pre-implants; NMOS; S/D regions; Si:B,P,As; USJ; amorphous layer formation; anneal temperatures; arsenic modeling; boron long-hop diffusion; boron-interstitial cluster model; calibration; diffusion profiles; dislocation loops; end of range defects; equilibrium state; extension regions; fully-coupled model; hybrid source/drain; implant damage; integrated modeling approach; junction engineering; low anneal temperature; modeling; optimization; point defect concentration; polysilicon activation; preamorphisation; spike RTA; steep interstitial gradient; ultra-shallow boron profile; ultra-shallow junction; Amorphous materials; Annealing; Boron; CMOS technology; Calibration; Implants; MOS devices; Semiconductor device modeling; Semiconductor process modeling; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. International Conference on
Conference_Location
Boston, MA, USA
Print_ISBN
0-7803-7826-1
Type
conf
DOI
10.1109/SISPAD.2003.1233685
Filename
1233685
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