DocumentCode
2098766
Title
A statistical performance simulation methodology for VLSI circuits
Author
Orshansky, Michael ; Chen, James C. ; Hu, Chenming
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1998
fDate
19-19 June 1998
Firstpage
402
Lastpage
407
Abstract
A statistical performance simulation (SPS) methodology for VLSI circuits is presented. Traditional methods of worst-case corner analysis lack accuracy and Monte-Carlo simulations cannot be applied to VLSI circuits because of their complexity. SPS methodology is accurate because no statistical information about the device parameter variation is lost. It achieves efficiency by analyzing the smaller circuit blocks and generating the performance distribution for the entire circuit. Circuit evaluation at any specified performance level is possible.
Keywords
VLSI; circuit analysis computing; performance evaluation; Monte-Carlo simulations; VLSI circuits; device parameter; performance distribution; statistical performance simulation; worst-case corner analysis; CMOS technology; Circuit optimization; Circuit simulation; Energy consumption; Permission; Predictive models; Principal component analysis; SPICE; Stochastic processes; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1998. Proceedings
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-89791-964-5
Type
conf
Filename
724506
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