Simultaneous A/D and D/A converters linearity testing with deterministic dithering

This paper reports a linearity test in which an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) with the same resolution are tested at the same time. The output levels of the DAC are dithered by a sinewave plus Gaussian noise, and acquired by the ADC. It is shown that a maximum likelihood (ML) estimator as well as a least squares (LS) estimator can be used to determine the code transition levels of the ADC, the output levels of the DAC and the parameters of the dithering signals. The root mean squared error (RMSE) of both estimators is compared with the Cramér-Rao lower bound (CRLB).