DocumentCode :
2099653
Title :
Synthesis of real-time supervisors for controlled time Petri nets
Author :
Sathaye, Archana S. ; Krogh, Bruce H.
Author_Institution :
Digital Equipment Corp., Nashua, NH, USA
fYear :
1993
fDate :
15-17 Dec 1993
Firstpage :
235
Abstract :
A method is presented to synthesize real-time supervisors for controlled time Petri nets (CtlTPNs) based on the synthesis of logical supervisors for a related untimed controlled automata. The approach is based on the generation of the control class graph (CCG) for the CtlTPN which models the complete logical behavior of the timed system
Keywords :
Petri nets; automata theory; control system synthesis; hierarchical systems; real-time systems; control class graph; controlled time Petri nets; logical supervisors; real-time supervisor synthesis; untimed controlled automata; Automata; Automatic control; Automatic generation control; Control system synthesis; Fires; Force control; Petri nets; State feedback; Supervisory control; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Decision and Control, 1993., Proceedings of the 32nd IEEE Conference on
Conference_Location :
San Antonio, TX
Print_ISBN :
0-7803-1298-8
Type :
conf
DOI :
10.1109/CDC.1993.325157
Filename :
325157
Link To Document :
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