DocumentCode :
2100777
Title :
Optimizing Partial Reconfiguration of Multi-context Architectures
Author :
Eisenhardt, Sven ; Oppold, Tobias ; Schweizer, Thomas ; Rosenstiel, Wolfgang
Author_Institution :
Dept. of Comput. Eng., Univ. of Tuebingen Sand, Tuebingen
fYear :
2008
fDate :
3-5 Dec. 2008
Firstpage :
67
Lastpage :
72
Abstract :
Multi-context reconfigurable arrays provide the ability for fast dynamic reconfiguration once the configurations have been stored into the architecture´s context memory. Besides switching the context of the entire array it is also possible to reconfigure contexts from outside the array, which we call external reconfiguration. If supported by the architecture, this reconfiguration, as well as switching contexts, can be performed partially. In this paper, we show how to take advantage of partial reconfiguration to optimize the latency induced by external reconfiguration. As an example we reconfigured an array to process FFT kernels of different sizes. As the best result it was even possible to achieve zero cycle latency.
Keywords :
optimisation; reconfigurable architectures; FFT kernels; multi-context reconfigurable arrays; multicontext architectures; optimization; partial reconfiguration; Computer architecture; Cyclic redundancy check; Delay; Field programmable gate arrays; Kernel; Memory architecture; National electric code; Reconfigurable architectures; Runtime; System-on-a-chip; array; coarse-grained; dynamic reconfiguration; multi-context; partial reconfiguration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reconfigurable Computing and FPGAs, 2008. ReConFig '08. International Conference on
Conference_Location :
Cancun
Print_ISBN :
978-1-4244-3748-1
Electronic_ISBN :
978-0-7695-3474-9
Type :
conf
DOI :
10.1109/ReConFig.2008.21
Filename :
4731772
Link To Document :
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