DocumentCode :
2101023
Title :
An efficient model of the CMOS inverter for nanometer technologies
Author :
Palampougioukis, Orestis ; Nikolaidis, S.
Author_Institution :
Dept. of Phys., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece
fYear :
2013
fDate :
8-11 Dec. 2013
Firstpage :
21
Lastpage :
24
Abstract :
In this paper, an approach for modeling the output waveform and the propagation delay of the CMOS inverter in nanometer technologies is introduced. An initial output waveform is calculated by solving the corresponding differential equations of the circuit only for the conducting transistor. The effect of the short-circuit current is treated as an additional charge that has to be discharged through the conducting transistor thus causing a time-shift of the initial output waveform. The dynamic behavior of the loading transistor is analyzed and the current due to its bulk-to-drain coupling capacitance is taken into account. Also, sub-threshold current is taken into account where significant.
Keywords :
CMOS integrated circuits; differential equations; invertors; nanotechnology; short-circuit currents; CMOS inverter; bulk-to-drain coupling capacitance; differential equations; nanometer technologies; output waveform; propagation delay; short-circuit current; transistor; CMOS integrated circuits; Integrated circuit modeling; Inverters; MOSFET; Semiconductor device modeling; Short-circuit currents;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on
Conference_Location :
Abu Dhabi
Type :
conf
DOI :
10.1109/ICECS.2013.6815335
Filename :
6815335
Link To Document :
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