Title :
Reducing power in high-performance microprocessors
Author :
Tiwari, Vivek ; Singh, Deo ; Rajgopal, Suresh ; Mehta, Gaurav ; Patel, Rakesh ; Baez, Franklin
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is outstripping the benefits of voltage reduction and feature size scaling. Designers are thus continuously challenged to come up with innovative ways to reduce power, while trying to meet all the other constraints imposed on the design. This paper presents an overview of the issues related to power consumption in the context of Intel CPUs. The main trends that are driving the increased focus on design for low power are described. System and benchmarking issues, and sources of power consumption in a high-performance CPU are briefly described. Techniques that have been tried on real designs in the past are described. The role of CAD tools and their limitations in this domain are also discussed. In addition, areas that need increased research focus in the future are also pointed out.
Keywords :
circuit CAD; microprocessor chips; CAD tools; Intel CPUs; benchmarking; high-performance microprocessors; low power; power consumption; Circuits; Costs; Design automation; Energy consumption; Geometry; Microprocessors; Permission; Power generation; Space technology; Voltage;
Conference_Titel :
Design Automation Conference, 1998. Proceedings
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-89791-964-5