DocumentCode :
2101259
Title :
Characteristics and sensitivity analysis of Gate Inside Junctionless Transistor (GI-JLT)
Author :
Kumar, Pranaw ; Kondekar, P.N. ; Singh, Sushil ; Agrawal, Ishu
Author_Institution :
Dept. of Electron. & Commun. Eng., PDPM IIITDM Jabalpur, Jabalpur, India
fYear :
2013
fDate :
8-11 Dec. 2013
Firstpage :
56
Lastpage :
59
Abstract :
In this paper, we have analyzed the impact of gate dielectric, doping concentration and channel engineering on the characteristics and sensitivity of Gate Inside Junctionless Transistor (GI-JLT). A numerical TCAD device simulator 3-D ATLAS version 2.10.18.R shows that GI-JLT can deplete the channel carriers more effectively compared with tri-gate and Gate-All-Around Junctionless Transistor (GAA-JLT). The GI-JLT transistor exhibits good transfer characteristics and reduces short channel effect (SCE) than a conventional inversion mode transistor with a high ION/IOFF ratio of 1011 subthreshold swing of 64 mV/dec and DIBL of 35 mV for the channel length of 18 nm with Aluminum Nitride (AlN) as gate dielectric material of thickness 1 nm. The characteristics and sensitivity of GI-JLT are analyzed by varying dielectric material, dielectric thickness, doping concentration and channel length. The simulation results indicate the suitability of the proposed novel structure for replacing the conventional CMOS inversion mode device.
Keywords :
III-V semiconductors; aluminium compounds; dielectric materials; semiconductor device models; sensitivity analysis; transistors; wide band gap semiconductors; 3-D ATLAS version 2.10.18.R; CMOS inversion mode device; DIBL; GAA-JLT; GI-JLT; SCE; TCAD device simulator; aluminum nitride; channel engineering; channel length; doping concentration; gate dielectric material; gate inside junctionless transistor; gate-all-around junctionless transistor; inversion mode transistor; sensitivity analysis; short channel effect; size 1 nm; size 18 nm; subthreshold swing; transfer characteristics; tri-gate transistor; Dielectric materials; Dielectrics; Doping; III-V semiconductor materials; Logic gates; Semiconductor process modeling; Transistors; Gated resistor; gate-all-around junctionless transistor (GAA-JLT); gate-inside junctionless transistor (GI-JLT); sensitivity; subthreshold swing (SS);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on
Conference_Location :
Abu Dhabi
Type :
conf
DOI :
10.1109/ICECS.2013.6815344
Filename :
6815344
Link To Document :
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