DocumentCode :
2102180
Title :
Enhanced Correlation Power Analysis Using Key Screening Technique
Author :
Katashita, Toshihiro ; Satoh, Akashi ; Sugawara, Takeshi ; Homma, Naofumi ; Aok, Takafumi
Author_Institution :
Nat. Inst. of Adv. Ind. Sci. & Technol., Tsukuba
fYear :
2008
fDate :
3-5 Dec. 2008
Firstpage :
403
Lastpage :
408
Abstract :
An enhanced CPA (correlation power analysis) attack which screens key candidates using correlation levels and ranking is proposed in this paper. An AES circuis is implemented on a Xilinxreg FPGA on SASEBO (side-channel attack standard evaluation board) specifically designed for side-channel attack experiments, and the proposed attack is performed and compared to the standard CPA. As a result, the key screening technique successfully reduces the calculation time for handing 5,000 power traces by 26%. In addition to the accelerated computation, the accuracy of the key estimation is also improved.
Keywords :
cryptography; field programmable gate arrays; AES circuis; Xilinx FPGA; enhanced correlation power analysis attack; key screening technique; side-channel attack standard evaluation board; Acceleration; Circuits; Cryptography; Field programmable gate arrays; IEC standards; ISO standards; Magnetic analysis; Monitoring; NIST; Resistors; CPA; FPGA; power analysis; side-channel attack;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reconfigurable Computing and FPGAs, 2008. ReConFig '08. International Conference on
Conference_Location :
Cancun
Print_ISBN :
978-1-4244-3748-1
Electronic_ISBN :
978-0-7695-3474-9
Type :
conf
DOI :
10.1109/ReConFig.2008.16
Filename :
4731828
Link To Document :
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