• DocumentCode
    2102431
  • Title

    Design and implementation of high-speed token bucket based on FPGA

  • Author

    Feng, Mingzhi ; Zhang, Hua ; Wang, Dong ; Sun, Zhigang

  • Author_Institution
    College of Computer, National University of Defense Technology, NUDT, Changsha, China
  • fYear
    2010
  • fDate
    4-6 Dec. 2010
  • Firstpage
    4474
  • Lastpage
    4476
  • Abstract
    Token bucket is a common traffic control technique which is widely used in network equipment for traffic shaping and rate constraint. This paper proposes a realization method of high-speed token bucket, and provides theoretical analysis on selection of parameters, such as time granularity, augment granularity and bucket depth. Based on the live streaming data captured on real network, we simulate the rate constraint effects of our designed high-speed token bucket. We also implement the design in Altera FPGA. Resource usage, working frequency and power estimation are provided in the paper. Analysis and experiments show that the proposed high-speed token bucket can accurately constraint rate as well as achieve a high performance up to 1186.40Gbps.
  • Keywords
    Computational modeling; Computers; Conferences; Field programmable gate arrays; Hardware design languages; IP networks; Quality of service; FPGA; token bucket; traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Science and Engineering (ICISE), 2010 2nd International Conference on
  • Conference_Location
    Hangzhou, China
  • Print_ISBN
    978-1-4244-7616-9
  • Type

    conf

  • DOI
    10.1109/ICISE.2010.5689415
  • Filename
    5689415