Title :
Planar device isolation for InP based DHBTs
Author :
Parthasarathy, N. ; Dong, Y. ; Scott, D. ; Urteaga, M. ; Rodwell, M.J.W.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
Abstract :
Device isolation of InP based HBTs in the mesa technology, is done by etching down to the substrate; this process suffers from lack of planarity and does not lend itself well to high levels of integration. We report on two techniques for planar isolation of InP based HBTs using selective implantation. The first method involves Fe implantation to isolate the InP collector-subcollector layers. In the second approach, we have utilized selective Si implantation in SI InP to form an isolated, N++ subcollector.
Keywords :
III-V semiconductors; doping profiles; electrodes; heterojunction bipolar transistors; indium compounds; ion implantation; iron; isolation technology; silicon; Fe implantation; InP based DHBT; InP collector-subcollector layers; InP:Fe; InP:Si; etching; integration levels; isolated N++ subcollector; mesa technology; planar device isolation; process planarity; selective Si implantation; selective implantation; Annealing; Double heterojunction bipolar transistors; Electrical resistance measurement; Implants; Indium phosphide; Iron; Leakage current; Substrates; Surface resistance; Temperature;
Conference_Titel :
Device Research Conference, 2004. 62nd DRC. Conference Digest [Includes 'Late News Papers' volume]
Print_ISBN :
0-7803-8284-6
DOI :
10.1109/DRC.2004.1367788
