Physical failure analysis to distinguish EOS and ESD failures

Author

Hang, Tung Chih ; Kou, Cheng Cheng ; Radhakrishnan, M.K. ; Iyer, Natarajan M

Author_Institution

Inst. of Microelectron., Singapore, Singapore

fYear

2002

fDate

2002

Firstpage

65

Lastpage

69

Abstract

A systematic physical failure analysis methodology can be applied to distinguish the damage induced by EOS and ESD in sub-micron silicon devices. Eventhough the electrical failure modes observed are identical, by a thorough analysis knowing the differences in failure signatures, as well as employing specific methods, it is found possible to distinguish between EOS and ESD failures to a great extent. Both field failed and simulated failed cases have been studied to establish the difference in failure signatures.

Keywords

electrostatic discharge; elemental semiconductors; failure analysis; integrated circuit reliability; integrated circuit testing; silicon; EOS induced damage; ESD induced damage; Si; electrical failure modes; failure signatures; physical failure analysis methodology; submicron Si devices; Biological system modeling; Earth Observing System; Electric breakdown; Electrostatic discharge; Failure analysis; Microelectronics; Semiconductor devices; Silicon devices; Testing; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 2002. IPFA 2002. Proceedings of the 9th International Symposium on the

Print_ISBN

0-7803-7416-9

Type

conf

DOI

10.1109/IPFA.2002.1025613

Filename

1025613