Solution to CMOS technology for high performance analog applications: GEWE-RC MOSFET

This paper focuses on the TCAD assessment of Gate Electrode Workfunction Engineered Recessed Channel (GEWE-RC) MOSFET as a solution to CMOS technology for high performance analog applications in terms of speed-to-power dissipation, device efficiency and hot electron injected gate current design parameters. Moreover, the paper also discusses the effect of gate stack architecture and various design parameters such as gate length (L_G), negative junction depth (NJD), substrate doping (N_A) and gate metal workfunction for different substrate (V_SUB) and drain to source (V_DS) voltages. The work, thus, proves the effectiveness of GEWE-RC for RFICs with higher efficiency, better speed power dissipation performance; and thus, in the design and modeling of power amplifiers. This performance assessment is carried out using ATLAS device simulator.