A monolithic 12-bit digitally calibrated D/A converter

A 12-bit monolithic D/A converter has been developed. The principle of proportional match design in the resistor switch network, its structural characteristics and the resistor network for calibration are elaborated. In order to cancel the variation of switch network resistance value caused by process, temperature and voltage, a new calibration circuit has been proposed. Finally this paper proposed an automatic calibration algorithm based on fuse trim, which can significantly improve the efficiency of trimming and lower the cost of DAC chip. Simulation results show that the linear error, differential error and full scale error of the converter all meet the requirements of 12-bit resolution. Operating at 15V, the DAC achieves a settling time of 1us for full scale voltage.