DocumentCode :
2104351
Title :
A tri-mode continuous-time /spl Sigma//spl Delta/ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver
Author :
van Veldhoven, R.
Author_Institution :
Philips Res. Labs., Eindhoven, Netherlands
fYear :
2003
fDate :
13-13 Feb. 2003
Firstpage :
60
Abstract :
Complex continuous-time fifth-order /spl Sigma//spl Delta/ modulator with 1b quantizer and switched-capacitor feedback DAC for a GSM/CDMA2000/UMTS receiver achieves a dynamic range of 92/83/74dB in 200/1228/3840kHz. Power consumption of one modulator is 3.8/4.1/4.5mW at 1.8V. Processed in 0.18/spl mu/m CMOS, the 0.55mm/sup 2/ IC includes a PLL, two oscillators and a bandgap reference.
Keywords :
3G mobile communication; CMOS integrated circuits; cellular radio; circuit feedback; digital-analogue conversion; radio receivers; sigma-delta modulation; switched capacitor networks; 0.18 micron; 1.8 V; 1228 kHz; 200 kHz; 3.8 mW; 3840 kHz; 4.1 mW; 4.5 mW; CMOS IC; GSM-EDGE/CDMA2000/UMTS receiver; dynamic range; switched-capacitor feedback DAC; tri-mode continuous-time sigma-delta modulator; 3G mobile communication; CMOS integrated circuits; CMOS process; Dynamic range; Energy consumption; Feedback; GSM; Oscillators; Phase locked loops; Photonic band gap;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-7707-9
Type :
conf
DOI :
10.1109/ISSCC.2003.1234207
Filename :
1234207
Link To Document :
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