DocumentCode
2104481
Title
A CMOS multi-channel 10Gb/s transceiver
Author
Takauchi, H. ; Tamura, H. ; Matsubara, S. ; Kibune, M. ; Doi, Y. ; Chiba, T. ; Anbutsu, H. ; Yamaguchi, H. ; Mori, T. ; Takatsu, M. ; Gotoh, K. ; Sakai, T. ; Yamamura, T.
Author_Institution
Fujitsu Labs. Ltd., Kawasaki, Japan
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
72
Abstract
A quad 10Gb/s transceiver in 0.11/spl mu/m CMOS communicates electric signals over balanced copper media. The transceiver uses a single 1.2V power supply and dissipates 415mW per channel. One PLL supplies a reference clock to two transmitter channels and two receiver channels. The transceiver contains analog front ends, clock recovery units, and 312MHz parallel interfaces.
Keywords
CMOS digital integrated circuits; transceivers; 0.11 micron; 1.2 V; 10 Gbit/s; 312 MHz; 415 mW; CMOS multi-channel quad transceiver; PLL; analog front-end; balanced copper medium; clock recovery unit; electric signal communication; parallel interface; reference clock; Binary codes; Circuits; Clocks; Digital filters; Laboratories; Large scale integration; Latches; MOS devices; Signal generators; Transceivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234212
Filename
1234212
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