Title :
A 3 A 20 MHz BiCMOS/DMOS power operational amplifier: a structural design approach
Author :
Ivanov, V. ; Baum, D.
Author_Institution :
Texas Instruments Inc, Tucson, AZ, USA
Abstract :
Design of a power op-amp using a structural design methodology is presented. The BiCMOS/DMOS op-amp features rail-to-rail output, 3 A maximum output current, adjustable current limit without delay, a class AB input stage with a 50 V//spl mu/s slew rate, and 100 dB open-loop gain with a 2 /spl Omega/ load. It consumes 50 mA from a single 7-16 V supply.
Keywords :
BiCMOS analogue integrated circuits; HF amplifiers; integrated circuit design; operational amplifiers; power amplifiers; power integrated circuits; radiofrequency amplifiers; 100 dB; 20 MHz; 3 A; 50 mA; 7 to 16 V; BiCMOS/DMOS power op amp; adjustable current limit; class AB input stage; power operational amplifier; rail-to-rail output; structural design methodology; Bandwidth; BiCMOS integrated circuits; Clamps; Feedback circuits; Feedback loop; Instruments; Operational amplifiers; Power amplifiers; Tail; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7707-9
DOI :
10.1109/ISSCC.2003.1234239
