DocumentCode
2105613
Title
Broadband ESD protection circuits in CMOS technology
Author
Galal, S. ; Razavi, B.
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
182
Abstract
Two broadband circuits for I/O protection employ on-chip T-coil networks and standard ESD devices. Fabricated in 0.18 /spl mu/m CMOS technology, the input and output circuits tolerate 1000 V and 800 V, respectively, and introduce 3 dB eye closure at 10 Gb/s.
Keywords
CMOS analogue integrated circuits; electrostatic discharge; impedance matching; protection; 0.18 /spl mu/m CMOS technology; 0.18 micron; 10 Gbit/s; 1000 V; 3 dB eye closure; 800 V; CMOS technology; broadband ESD protection circuits; input circuits; on-chip T-coil networks; output circuits; Bandwidth; Bridge circuits; CMOS technology; Capacitors; Electrostatic discharge; Frequency; Integrated circuit technology; Parasitic capacitance; Protection; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234258
Filename
1234258
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