DocumentCode
2105967
Title
A 0.18 /spl mu/m high dynamic range NTSC/PAL imaging system-on-chip with embedded DRAM frame buffer
Author
Bidermann, W. ; El Gamal, A. ; Ewedemi, S. ; Reyneri, J. ; Tian, H. ; Wile, D. ; Yang, D.
Author_Institution
Pixim Inc., Mountain View, CA, USA
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
212
Abstract
The CMOS imaging system-on-chip includes an embedded frame buffer and operates at 100 MHz. The programmable chip produces color video at up to 500 frames/s with over 100 dB dynamic range using multi-capture. The sensor utilizes a 0.18 /spl mu/m 1 P 4 M CMOS process and dissipates 600 mW including I/O.
Keywords
CMOS image sensors; DRAM chips; embedded systems; image colour analysis; system-on-chip; video signal processing; 0.18 micron; 100 MHz; 600 mW; CMOS imaging system-on-chip; NTSC/PAL imaging system-on-chip; color video; dynamic range; embedded DRAM frame buffer; embedded frame buffer; multi-capture; power dissipation; programmable chip; Buffer storage; CMOS image sensors; CMOS technology; Capacitors; Circuits; Dynamic range; Pixel; Random access memory; System-on-a-chip; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234271
Filename
1234271
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