DocumentCode
2106187
Title
A new self-organizing approach for congestion control in ATM networks
Author
Mohamed, Abduljalil A. ; El-Hawary, Mohamed
Author_Institution
Dept. of Electr. & Comput. Eng., Dalhousie Univ., Halifax, NS, Canada
Volume
2
fYear
2000
fDate
2000
Firstpage
647
Abstract
This paper presents a new approach to the problem of congestion control arising at a non-blocking ATM switch with input queues. When two or more packets in the switch input buffers simultaneously request the same output port of an ATM switch, congestion will occur, and one of these packets will be transmitted and the others will be either buffered or dropped. In order to prevent this cell discarding, input queuing is widely used. The only problem with input queuing is the head-of-line (HOL) blocking in which a packet in a first-in-first-out (FIFO) queue has no chance to access an available output port because the packet ahead of it in the buffer is blocked. In order to solve this problem, many algorithms have been presented. One of these algorithms is the input window policy algorithm which divides the contention resolution process into S steps during a time slot to find an optimal set of packets. In the optimal set, each packet must have a different destination address. We introduce a new self-organizing neural network approach to resolve the contention problem based on the input window policy algorithm. From the simulation results shown, our neural network model provides the same switch throughput as that of the input window policy. However, the new approach is definitely much faster than the original algorithm in terms of finding this optimal set due to the parallel processing performance of the neural networks
Keywords
asynchronous transfer mode; buffer storage; packet switching; queueing theory; self-organising feature maps; telecommunication computing; telecommunication congestion control; telecommunication networks; ATM networks; FIFO queue; HOL blocking; cell discarding; congestion control; contention resolution; destination address; first-in-first-out queue; head-of-line blocking; input buffers; input queuing; input window policy algorithm; neural network model; nonblocking ATM switch; optimal packets set; parallel processing performance; self-organizing neural network; simulation results; switch throughput; Artificial neural networks; Asynchronous transfer mode; Computer networks; Intelligent networks; Neural networks; Packet switching; Parallel processing; Resource management; Switches; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2000 Canadian Conference on
Conference_Location
Halifax, NS
ISSN
0840-7789
Print_ISBN
0-7803-5957-7
Type
conf
DOI
10.1109/CCECE.2000.849545
Filename
849545
Link To Document