Improvement in simulation efficiency by means of the standard clock: a quantitative study

Discusses the application of the standard clock (SC) approach to the simulation of several examples of discrete-event dynamic systems (DEDS), and demonstrates the improved efficiency that can be achieved by using this approach. First, the authors consider a single M/M/1/K queue, and then networks of interconnected queues of this type. Finally, the authors consider the application of this technique to multihop circuit-switched voice communication networks. The authors´ focus is on the improvement in simulation times that can be achieved on a sequential computer, rather than on the performance results of the system being simulated. The authors quantify the time spent in the various aspects of the simulation, including event generation and state updating, and compare predicted performance improvement with that which is actually measured