Title :
A 20 GS/s 8 b ADC with a 1 MB memory in 0.18 /spl mu/m CMOS
Author :
Poulton, K. ; Neff, R. ; Setterberg, B. ; Wuppermann, B. ; Kopley, T. ; Jewett, R. ; Pernillo, J. ; Tan, C. ; Montijo, A.
Author_Institution :
Agilent Labs., Palo Alto, CA, USA
Abstract :
A 20 GS/s 8-bit ADC achieves a bandwidth of 6 GHz in 0.18 /spl mu/m CMOS. The implementation uses 80 time-interleaved current-mode pipeline sub-ADCs and stores data at 20 GB/s into a 1 MB on-chip memory. The ADC is packaged with a BiCMOS input buffer chip in a 438-ball BGA, and total power consumption is 10 W.
Keywords :
CMOS integrated circuits; CMOS memory circuits; analogue-digital conversion; ball grid arrays; current-mode circuits; integrated circuit packaging; 0.18 /spl mu/m CMOS; 0.18 micron; 1 MB; 10 W; 20 GB/s; 20 GS/s 8-bit ADC; 438-ball BGA; 6 GHz; 8 bit; ADC packaging; BiCMOS input buffer chip; on-chip memory; time-interleaved current-mode pipeline sub-ADCs; total power consumption; BiCMOS integrated circuits; Bonding; Clocks; FETs; Laboratories; MOS devices; Pipelines; RLC circuits; Resistors; Transconductors;
Conference_Titel :
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7707-9
DOI :
10.1109/ISSCC.2003.1234315
