Title :
Impact of dielectric relaxation on a 14 b pipeline ADC in 3 V SiGe BiCMOS
Author :
Zanchi, A. ; Tsay, F. ; Papantonopoulos, I.
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
Dielectric relaxation in PECVD SiN capacitors of a 45 GHz 0.4 /spl mu/m SiGe BiCMOS process degrades performance even at low frequencies. In the design of pipelined 14 b 70 MS/s ADC, the effects of dielectric relaxation are identified via behavioral/circuit simulations and ad-hoc tests. After LPCVD oxide capacitors are introduced, a 5.3/spl times/5.3 mm/sup 2/ test chip delivers 72 dB SNR, 81 dBc SFDR, and 11.5 ENOB at 70 MS/s with a 1 MHz input. The IC dissipates 1 W from 3.3 V.
Keywords :
BiCMOS integrated circuits; Ge-Si alloys; MIS capacitors; SPICE; analogue-digital conversion; circuit simulation; dielectric relaxation; pipeline processing; 0.4 micron; 1 W; 14 b pipeline ADC; 14 bit; 3 V; 3 V SiGe BiCMOS; 45 GHz; ENOB; LPCVD oxide capacitors; PECVD SiN capacitors; SFDR; SNR; SiGe; SiN; Spice simulations; ad-hoc tests; behavioral/circuit simulations; dielectric relaxation; low frequencies; performance degradation; power dissipation; BiCMOS integrated circuits; Capacitors; Circuit testing; Degradation; Dielectrics; Frequency; Germanium silicon alloys; Pipelines; Silicon compounds; Silicon germanium;
Conference_Titel :
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7707-9
DOI :
10.1109/ISSCC.2003.1234321
