DocumentCode
2108697
Title
A 1.5V 1.7ns 4k /spl times/ 32 SRAM with a fully-differential auto-power-down current sense amplifier
Author
Wicht, B. ; Larguier, J.-Y. ; Schmitt-Landsiedel, D.
Author_Institution
Tech. Univ. Munich, Germany
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
462
Abstract
A fully-differential current sense amplifier operates as low as 0.7V, automatically turns off after reading and features fast precharge. An implementation of a 1.5V 4k /spl times/ 32 dual-port SRAM macro in a 130nm CMOS process achieves an access time of 1.7ns.
Keywords
CMOS memory circuits; SRAM chips; differential amplifiers; low-power electronics; 1.5 V; 1.7 ns; 130 nm; CMOS process; dual-port SRAM macro; fully-differential auto-power-down current sense amplifier; Capacitance; Circuits; Decoding; Differential amplifiers; Energy consumption; Latches; Multiplexing; Partial discharges; Random access memory; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234387
Filename
1234387
Link To Document