Evolution in IGBT´s protection against short circuit behaviors by gate-side circuitry

Some strategies of protection against short-circuit faults, which are able to limit the current through IGBT devices, are discussed in this project. A preliminary description of the fault types hard switching fault (HSF) and fault under load (FUL) is presented along with known protection mechanisms intended to reduce the negative effects on the integrity of the devices. The damages induced by a fault condition can be prevented by means of a suitable gate-side circuitry designed to this aim, thus allowing safe operation of the IGBTs. The goal of this protection circuit is not only to avoid the device failure but also eventually assuring the recovery of the conducting state as long as the fault causes expire. Besides, the intervention to impede high current peak transients, though not leading to failure, is requested in order to decrease the thermal stresses on the devices. An alternative different way, aiming to approach the short circuit protection issue, is obtained by the integration of both the gate-side circuitry and the power device in a monolithic chip for the sake of providing within the IGBT the diagnostic and the protection functions too. Such a solution, which is briefly recalled with reference to the state of the art, is to compared with the new one.