FinFET-based pseudo-spin-transistor: Design and performance

FinFET-based pseudo-spin-transistors referred to as pseudo-spin-FinFETs (PS-FinFETs) were computationally investigated, in which a high-performance FinFET and a spin-transfer-torque magnetic tunnel junction (STT-MTJ) were used to implement a PS-FinFET. The performance of PS-FinFETs was analyzed by HSPICE simulations using a predictive technology model of a FinFET and our developed STT-MTJ macromodel. The design method of PS-FinFETs was developed based on the systematic simulations. The application of PS-FinFETs to a nonvolatile SRAM cell was also explored. PS-FinFETs can introduce nonvolatile power-gating architecture into FinFET-based logic systems, leading to energy-efficient high-performance logic systems.