DocumentCode :
2109323
Title :
Scaling and optimization of high-density integrated Si-capacitors
Author :
Weinreich, W. ; Seidel, K. ; Rudolph, Matthias ; Koch, Jurgen ; Paul, J. ; Riedel, S. ; Sundqvist, Jonas ; Steidel, Katja ; Gutsch, Manuela ; Beyer, V. ; Hohle, Christoph
Author_Institution :
Bus. Unit Fraunhofer Center Nanoeletronic Technol., Fraunhofer Inst. of Photonic Microsyst., Dresden, Germany
fYear :
2013
fDate :
26-27 Sept. 2013
Firstpage :
1
Lastpage :
4
Abstract :
This paper focuses on the scaling and optimization of metal-isolator-metal capacitors integrated in 3D Si structures. Scaling to high capacitance density is aimed by the use of high-k dielectrics and a significant area enhancement realized through silicon pattering with increasing aspect ratios. By material and process optimization the capacitors show excellent IV and CV characteristics with high temperature and reliability performance independently of the 3D structure. A fully functional capacitor of 4mm2 consisting of 80 Mil trenches with an overall capacitance of 850nF can be demonstrated.
Keywords :
capacitors; elemental semiconductors; high-k dielectric thin films; optimisation; reliability; silicon; 3D Si structure; CV characteristic; IV characteristic; Si; capacitance 850 nF; high capacitance density; high-density integrated Si-capacitor; high-k dielectrics; metal-isolator-metal capacitor; optimization; reliability; scaling; silicon pattering; Capacitance; Capacitors; Electrodes; High K dielectric materials; Reliability; Three-dimensional displays; 3D Si trench etch; high-density capacitor; high-k;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference Dresden-Grenoble (ISCDG), 2013 International
Conference_Location :
Dresden
Print_ISBN :
978-1-4799-1250-6
Type :
conf
DOI :
10.1109/ISCDG.2013.6656306
Filename :
6656306
Link To Document :
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