DocumentCode :
2109679
Title :
Analysis and optimization of program disturb in split-gate cells using source side injection and impact on further cell size reduction
Author :
Bukethal, Christoph ; Tempel, G. ; Strenz, Robert ; Power, Jonathan
Author_Institution :
Infineon Technol. Dresden GmbH, Dresden, Germany
fYear :
2013
fDate :
26-27 Sept. 2013
Firstpage :
1
Lastpage :
3
Abstract :
Program disturb is a major issue limiting the functionality of hot carrier programmed flash memories. This paper reports a detailed characterization of program disturb in a split-gate flash memory cell using source side injection programming. Key parameters influencing the cell´s disturb sensitivity have been investigated, empirical models have been developed and a physical root cause has been identified. Conclusions for cell operation and cell size reduction capabilities are drawn.
Keywords :
flash memories; optimisation; cell disturb sensitivity; cell operation; cell size reduction; hot carrier programmed flash memories; optimization; program disturb; source side injection programming; split gate flash memory cell; Acceleration; Arrays; Logic gates; Programming; Robustness; Split gate flash memory cells; Drain Disturb; Flash; Source Side Injection; Split-gate;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference Dresden-Grenoble (ISCDG), 2013 International
Conference_Location :
Dresden
Print_ISBN :
978-1-4799-1250-6
Type :
conf
DOI :
10.1109/ISCDG.2013.6656317
Filename :
6656317
Link To Document :
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