Performance of a Quaternary Logic Design

Author

Dornajafi, Mahsa ; Watkins, Steve E. ; Cooper, Benjamin ; Bales, M. Ryan

Author_Institution

Electr. & Comput. Eng. Dept, Missouri Univ. of Sci. & Technol., Rolla, MO

fYear

2008

fDate

17-20 April 2008

Firstpage

1

Lastpage

6

Abstract

This paper analyzes the performance of a quaternary logic circuit and its components. The multi-valued logic design consisting of two drivers and a transistor matrix is simulated using Mentor Graphic software. Functional operation of the circuit is shown and propagation delay and power consumption are determined. The design is dependent on the voltage values for the multi-valued logic. Three logic cases are investigated. The performance of the logic circuit as a quaternary difference calculator is described.

Keywords

driver circuits; logic design; matrix algebra; multivalued logic; multivalued logic circuits; Mentor Graphic software; drivers; functional operation; multivalued logic circuit; power consumption; propagation delay; quaternary difference calculator; quaternary logic design; transistor matrix; Circuit simulation; Driver circuits; Energy consumption; Graphics; Logic circuits; Logic design; Multivalued logic; Performance analysis; Propagation delay; Voltage; Multi-valued logic circuits; circuit simulation; inverters; memory architecture;

fLanguage

English

Publisher

ieee

Conference_Titel

Region 5 Conference, 2008 IEEE

Conference_Location

Kansas City, MO

Print_ISBN

978-1-4244-2076-6

Electronic_ISBN

978-1-4244-2077-3

Type

conf

DOI

10.1109/TPSD.2008.4562722

Filename

4562722