DocumentCode
2109860
Title
System design based on interface specifications
Author
Shaw, Earl ; Khordoc, Karim
Author_Institution
MACS Lab., McGill Univ., Montreal, Que., Canada
Volume
1
fYear
2000
fDate
2000
Firstpage
189
Abstract
This paper examines a proposed design methodology that develops systems on the basis of their interface behaviour. Systems are specified using HAAD (Hierarchical Annotated Action Diagrams); a specification methodology based on a set of structured timing diagrams. Timing diagrams are annotated with predicates and VHDL constructs to express functional aspects of the design. This allows the concurrent development of both the functional and interface behaviours. The fully refined systems are represented as Synchronous Signal Event Graphs (S-SEG) that are then converted into Hierarchal Concurrent Finite State Machines (HCFSM) and translated into synthesizable VHDL code that is used to generate the corresponding hardware of the system. The procedure is illustrated with a simple example
Keywords
application specific integrated circuits; finite state machines; hardware description languages; high level synthesis; signal flow graphs; timing; ASIC; HAAD; VHDL constructs; concurrent development; design methodology; fully refined systems; functional aspects; hierarchal concurrent finite state machines; hierarchical annotated action diagrams; interface specifications; predicates; structured timing diagrams; synchronous signal event graphs; synthesizable VHDL code; Application specific integrated circuits; Automata; Circuit synthesis; Control system synthesis; Design methodology; Hardware; Laboratories; Signal synthesis; Testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2000 Canadian Conference on
Conference_Location
Halifax, NS
ISSN
0840-7789
Print_ISBN
0-7803-5957-7
Type
conf
DOI
10.1109/CCECE.2000.849696
Filename
849696
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