• DocumentCode
    2110511
  • Title

    Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate

  • Author

    Thapliyal, Himanshu ; Ranganathan, Nagarajan

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL
  • fYear
    2009
  • fDate
    13-15 May 2009
  • Firstpage
    229
  • Lastpage
    234
  • Abstract
    Reversible logic has extensive applications in quantum computing, low power VLSI design, quantum dot cellular automata and optical computing. While several researchers have investigated the design of reversible logic elements, there is not much work reported on reversible binary subtractors. In this paper, we propose the design of a new reversible gate called TR gate. Further, we investigate the design of reversible binary subtractors based on the proposed TR gate. The proposed TR gate is better for designing reversible binary subtractor compared to such gates discussed in literature in terms of quantum cost, garbage outputs and complexity of gates.
  • Keywords
    VLSI; logic design; logic gates; quantum computing; low power VLSI design; optical computing; quantum computing; quantum dot cellular automata; reversible binary subtractors; reversible gate; reversible logic; Computer applications; Costs; Logic design; Logic gates; Optical computing; Optical design; Quantum cellular automata; Quantum computing; Quantum dots; Very large scale integration; Binary subtractors; Reversible logic; TR gate;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 2009. ISVLSI '09. IEEE Computer Society Annual Symposium on
  • Conference_Location
    Tampa, FL
  • Print_ISBN
    978-1-4244-4408-3
  • Electronic_ISBN
    978-0-7695-3684-2
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2009.49
  • Filename
    5076412