• DocumentCode
    2110580
  • Title

    Synthesis Oriented Scheduling of Multiparty Rendezvous in Transaction Level Models

  • Author

    Venkataraman, Vyas ; Wang, Di ; Mahram, Atabak ; Qin, Wei ; Bose, Mrinal ; Bhadra, Jayanta

  • Author_Institution
    Electr. & Comput. Eng. Dept., Boston Univ., Boston, MA
  • fYear
    2009
  • fDate
    13-15 May 2009
  • Firstpage
    241
  • Lastpage
    246
  • Abstract
    Due to the large semantic gap between transaction level models and actual implementations, hardware synthesis based on system level models has been a great challenge. Aiming to close the semantic gap, we studied an approach that uses rendezvous to model communication. By allowing both conjunctive and disjunctive composition of rendezvous, the approach supports flexible communication patterns involving multiple processes. However, a practical issue of the model is the complexity of scheduling of multiparty rendezvous, which is NP hard in general. This paper proposes an efficient scheduling algorithm. It begins by encapsulating state transition information of processes into a relation graph. It then creates a tree that relates edge combinations. The tree is used to guide the scheduler at run time to search for schedulable sets. Experimental results prove that this algorithm improves our scheduler significantly. The algorithm lays the ground for the synthesis of the communication and synchronization circuitry for the system.
  • Keywords
    electronic engineering computing; encapsulation; hardware description languages; trees (electrical); actual implementations; communication and synchronization circuitry; encapsulating state transition information; hardware synthesis; multiparty rendezvous; scheduler; semantic gap; synthesis oriented scheduling; transaction level models; tree; Circuit synthesis; Computer Society; Computer languages; Hardware; High level languages; Processor scheduling; Scheduling algorithm; Tree graphs; USA Councils; Very large scale integration; Algorithm; Design Languages; Modeling; Verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 2009. ISVLSI '09. IEEE Computer Society Annual Symposium on
  • Conference_Location
    Tampa, FL
  • Print_ISBN
    978-1-4244-4408-3
  • Electronic_ISBN
    978-0-7695-3684-2
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2009.8
  • Filename
    5076414