DocumentCode
2110621
Title
Energy-Efficient Encoding for High-Performance Buses with Staggered Repeaters
Author
Jayaprakash, Sharath ; Mahapatra, Nihar R.
Author_Institution
Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI
fYear
2009
fDate
13-15 May 2009
Firstpage
252
Lastpage
257
Abstract
High-performance buses often use staggered repeaters to mitigate the adverse impact on latency of worst-case capacitive crosstalk between adjacent wires by exploiting the data-dependent nature of crosstalk. An undesirable side effect of staggered repeaters is that they may increase the overall energy of a bus carrying highly correlated traffic associated with real-world benchmarks. In this paper, we introduce an energy model for a staggered-repeater bus (SRB) configuration and propose a low-power dynamic encoding scheme that yields average bus energy reductions for an SRB in excess of 28% and 26% for data and instruction traffic, respectively, for SPEC CPU2k benchmarks.
Keywords
crosstalk; encoding; energy conservation; microprocessor chips; power aware computing; repeaters; capacitive crosstalk; correlated traffic; energy-efficient encoding; high-performance buses; low-power dynamic encoding scheme; staggered-repeater bus configuration; Crosstalk; Delay; Encoding; Energy dissipation; Energy efficiency; Microprocessors; Repeaters; Routing; Traffic control; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2009. ISVLSI '09. IEEE Computer Society Annual Symposium on
Conference_Location
Tampa, FL
Print_ISBN
978-1-4244-4408-3
Electronic_ISBN
978-0-7695-3684-2
Type
conf
DOI
10.1109/ISVLSI.2009.58
Filename
5076416
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