DocumentCode :
2110886
Title :
Research on the disposal of negative partial product for booth algorithm
Author :
Li, Zheng ; Chen, Haimin ; Yang, Xianwen
Author_Institution :
Electron. Technol. Inst., Zhengzhou Inf. Eng. Univ., Zhengzhou, China
fYear :
2010
fDate :
17-19 Dec. 2010
Firstpage :
1115
Lastpage :
1117
Abstract :
Booth algorithm is the classic method of partial product (PP) encoding in hardware design of multiplier, which is adopted by nearly all modern multipliers. This paper carries deep research on the disposal of negative PP based on Radix-4 Booth algorithm. Through recombining PP, it advances a skilled method avoiding the additive arithmetic of “plus 1” when computing the complement for negative PP, without increasing new PP. We prove this disposal correct and advanced in theory, and experimentalize it in multiplier design. The experiment result shows it could obviously improve the performance of multiplier. This method is of great significance for shortening the key path of multiplier and then improving its execution speed, which could be applied in all multipliers based on Radix-4 Booth encoding.
Keywords :
digital arithmetic; encoding; logic design; multiplying circuits; PP encoding; Radix-4 booth algorithm; Radix-4 booth encoding; additive arithmetic; multiplier design; multiplier hardware design; negative PP; negative partial product; partial product encoding; Adders; Additives; Algorithm design and analysis; Compressors; Encoding; Hardware; Microprocessors; Radix-4 Booth algorithm; key path; multiplier; negative PP;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory and Information Security (ICITIS), 2010 IEEE International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-6942-0
Type :
conf
DOI :
10.1109/ICITIS.2010.5689749
Filename :
5689749
Link To Document :
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