Design of a dynamic frequency compensation low dropout voltage regulator with buffer impedance attenuation

Author

Peng, Zhenyu ; Lv, Changzhi ; She, Shuojie

Author_Institution

Reliability Phys. Lab., Beijing Univ. of Technol., Beijing, China

fYear

2012

fDate

21-23 April 2012

Firstpage

2521

Lastpage

2524

Abstract

This paper presents a low-drop (LDO) linear regulator with buffer impedance attenuation (BIA) for frequency compensation. This novel proposed LDO take advantage of the dynamically-biased shunt feedback in the buffer stage, which could lower its output resistance for driving the pass device to achieve fast response. Implemented in 0.35μm CMOS process, the LDO dissipates 184μA quiescent current and is able to deliver up to 100mA load current. With a 2.3μF output capacitance, the maximum transient-output variation is 25mV with full-load step change of 100mA. The proposed circuit will find application in the battery-powered portable devices.

Keywords

CMOS integrated circuits; buffer circuits; voltage regulators; BIA; CMOS process; LDO; battery-powered portable device; buffer impedance attenuation; capacitance 2.3 muF; current 100 mA; current 184 muA; dynamic frequency compensation low dropout voltage regulator design; dynamically-biased shunt feedback; frequency compensation; low-drop linear regulator; size 0.35 mum; transient-output variation; voltage 25 mV; Capacitance; Impedance; Regulators; Resistance; Stability analysis; Transistors; Voltage control; BIA; LDO; pass device; shunt feedback;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics, Communications and Networks (CECNet), 2012 2nd International Conference on

Conference_Location

Yichang

Print_ISBN

978-1-4577-1414-6

Type

conf

DOI

10.1109/CECNet.2012.6201453

Filename

6201453