Block RAM versus distributed RAM implementation of SVM Classifier on FPGA

Author

Fazakas, Albert ; Neag, Marius ; Festila, Lelia

Author_Institution

Tech. Univ. of Cluj-Napoca, Cluj-Napoca

fYear

2006

fDate

6-7 Sept. 2006

Firstpage

43

Lastpage

46

Abstract

Support Vector Machines are widely used in pattern recognition, being the newest achievements in neural network structures. This paper presents a Block RAM -based implementation example of an SVM classification function using a Spartan3 FPGA, compared versus a distributed LUT-based RAM one The number of required clock periods and the maximum clock frequency is calculated and a speed comparison of the implemented system with software running on a PC targeting the same application is also made Keywords: SVM, Block RAM, LUT-based RAM, FPGA.

Keywords

field programmable gate arrays; pattern recognition; random-access storage; support vector machines; FPGA; SVM classifier; block RAM; distributed RAM; pattern recognition; support vector machines; Clocks; Field programmable gate arrays; Frequency; Image databases; Kernel; Neural networks; Pattern recognition; Support vector machine classification; Support vector machines; Table lookup; Block RAM; FPGA; LUT-based RAM; SVM;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Electronics, 2006. AE 2006. International Conference on

Conference_Location

Pilsen

Print_ISBN

80-7043-442-2

Type

conf

DOI

10.1109/AE.2006.4382960

Filename

4382960