DocumentCode :
2114502
Title :
Hierarchies of circuit classes that are closed under complement
Author :
Vinay, V.
Author_Institution :
Dept. of Computer Sci. & Autom., Indian Inst. of Sci., Bangalore, India
fYear :
1996
fDate :
24-27 May 1996
Firstpage :
108
Lastpage :
117
Abstract :
We examine three hierarchies of circuit classes and show they are closed under complementation. (1) The class of languages recognized by a family of polynomial size skew circuits with width O(w), are closed under complement. (2) The class of languages recognized by family of polynomial size circuits with width O(w) and polynomial tree-size, are closed under complement. (3) The class of languages recognized by a family of polynomial size, O(log(n)) depth, bounded AND fan-in with OR fan-in f (f⩾log(n)) circuits are closed under complement. These improve upon the results of (i) Immerman (1988) and Szelepcsenyi (1988), who show that 𝒩L𝒪𝒢 is closed under complementation, and (ii) Borodin et al. (1989), who show that L𝒪𝒢𝒞ℱL is closed under complement
Keywords :
computational complexity; parallel algorithms; circuit classes; class of languages; closed under complement; hierarchies; parallel complexity; polynomial size skew circuits; Binary decision diagrams; Circuit simulation; Computer science; Polynomials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Complexity, 1996. Proceedings., Eleventh Annual IEEE Conference on
Conference_Location :
Philadelphia, PA
Print_ISBN :
0-8186-7386-9
Type :
conf
DOI :
10.1109/CCC.1996.507674
Filename :
507674
Link To Document :
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