An Efficient Method for Assessing Board Level Reliability for Micro-electronic Packages using Combined Experimental - Numerical Techniques

Author

Jansen, M.Y. ; de Vries, J.W.C. ; van Driel, W.D.

Author_Institution

Philips Appl. Technol., Eindhoven

fYear

2006

fDate

24-26 April 2006

Firstpage

1

Lastpage

5

Abstract

A new method was developed for modeling electronic packages. The method is applied to a BGA 256 on board. The simulation results were compared to measured results of a thermal cycle test and a thermal shock test. The methodology has shown to be accurate and efficient. This work also shows that thermal transient behavior must be considered in situations where high gradients can occur, like thermal shock tests

Keywords

ball grid arrays; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; BGA 256; ball grid array; board level reliability assessment; microelectronic packages; thermal cycle test; thermal shock test; thermal transient behavior; Electric shock; Electronic packaging thermal management; Geometry; Parametric statistics; Predictive models; Semiconductor device packaging; Semiconductor device testing; Shape measurement; Soldering; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2006. EuroSime 2006. 7th International Conference on

Conference_Location

Como

Print_ISBN

1-4244-0275-1

Type

conf

DOI

10.1109/ESIME.2006.1643982

Filename

1643982