Floating-point error and its effect analysis of digital pre-distortion

The power amplifier of the radio repeater often works in the nonlinear regime to improve its efficiency, which will not only cause a lower SNR and mutual interference between the channels, but also increase the error rate of the signals transmitted in their own channels. This paper utilizes the pre-distortion technology to solve the problem and applies the QRD_RLS self-adaptive algorithm to realize the DPD in FPGA. The data truncation errors in FPGA are operated and stored by a finite floating point. Based on results of DPD, the rise of baseline is analyzed in this paper. This paper proves that error is the leading cause to the rise of baseline. Moreover, the errors caused by the truncate operation are discussed, and the method of reducing truncation errors is also demonstrated. After optimization, the SNR of the circuit grows more than 35 dB, the ACPR improves 20 dB and the influence of errors is limited to merely 3dB.