DocumentCode
2116495
Title
Microprogramming heritage of RISC design
Author
Shih, Liwen
Author_Institution
Comput. Syst. Design & Eng., Houston Univ., TX, USA
fYear
1990
fDate
27-29 Nov 1990
Firstpage
275
Lastpage
280
Abstract
The paper summarizes the current design trends of micro-architectures and analyzes the tradeoffs between the RISC approach and the microprogramming approach especially on vertical migration among hardware, firmware, compilation, and software. RISCs simplicity is contrasted by the regularity of microprogrammed control. The RISC design incentives are categorized into three perspectives, namely, technology-driven, application-driven, and performance-driven. Traditional firmware migration approaches are reviewed and related to the RISC design philosophy as well as, the writable instruction set computer (WISC) concept. Research such as firmware migration candidates selection can be applied to RISC instruction set design. Similarly, micro-code generation and compaction research can be used to construct smart, optimizing RISC compilers. Horizontal microcoding is interpreted by the very long instruction word (VLIW) architecture
Keywords
microprogramming; reduced instruction set computing; RISC design; design trends; firmware migration candidates selection; instruction set design; microarchitectures; optimizing RISC compilers; very long instruction word; writable instruction set computer; Clocks; Computer aided instruction; Computer architecture; Data engineering; Design engineering; Hardware; Microprogramming; Optimizing compilers; Pipelines; Reduced instruction set computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microprogramming and Microarchitecture. Micro 23. Proceedings of the 23rd Annual Workshop and Symposium., Workshop on
Conference_Location
Orlando, FL
Print_ISBN
0-8186-2124-9
Type
conf
DOI
10.1109/MICRO.1990.151454
Filename
151454
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