Title :
An Area Optimized Implementation of Cryptographic Algorithm RC5
Author :
Liang, Jing ; Wang, Qin ; Qi, Yue ; Yu, Feng
Author_Institution :
Dept. of Comput. Sci. & Technol., Univ. of Sci. & Technol. Beijing, Beijing, China
Abstract :
As a widely used symmetrical block cryptographic algorithm, RC5 has the characteristic of variable block length, variable round number and variable key length to satisfy the security need of different application environment. This paper presents an area efficient and reconfigurable hardware circuit. Using loop unrolling technology, the hardware circuit costs less resources by 74.7% compared to the conventional area optimized implementation of RC5 algorithm.
Keywords :
cryptography; field programmable gate arrays; FPGA hardware implementation; RC5 block cipher; RC5 cryptographic algorithm; area optimized implementation; loop unrolling technology; reconfigurable hardware circuit; reconfigurable shifter design; symmetrical block cryptographic algorithm; variable block length; variable key length; variable round number; Application software; Circuits; Computer science; Computer security; Cost function; Cryptography; Data security; Hardware design languages; Very large scale integration; Wireless communication;
Conference_Titel :
Wireless Communications, Networking and Mobile Computing, 2009. WiCom '09. 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-3692-7
Electronic_ISBN :
978-1-4244-3693-4
DOI :
10.1109/WICOM.2009.5302669
