Title :
Facing the Challenge of Designing for Cu/Low-k Reliability
Author_Institution :
Delft Univ. of Technol.
Abstract :
This paper highlights some of the solutions for the typical reliability problems faced during the development of the Cu/low-k technology that were needed to overcome the problems encountered throughout the complete manufacturing process from IC front-end to packaging back-end
Keywords :
copper; integrated circuit packaging; integrated circuit reliability; Cu; Cu/low-k reliability; Cu/low-k technology; IC packaging; integrated circuit packaging; integrated circuit reliability; CMOS integrated circuits; Conducting materials; Copper; Dielectric materials; Electronics industry; Integrated circuit packaging; Manufacturing processes; Materials reliability; Silicon; Thermal stresses;
Conference_Titel :
Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2006. EuroSime 2006. 7th International Conference on
Conference_Location :
Como
Print_ISBN :
1-4244-0275-1
DOI :
10.1109/ESIME.2006.1644061
