Title :
Twin Butterfly High Throughput Parallel Architecture FFT Algorithm
Author :
Chao, Wang ; Peng, Han Yun
Author_Institution :
Sch. of Inf. Eng., Univ. of Sci. & Technol. Beijing, Beijing
Abstract :
A novel parallel memory accessing for decimation-in-time twin butterfly parallel architecture radix-4 FFT algorithm is proposed, which is based on "in-place" principle and allows conflict-free access to the 8 operands needed for calculation of the twin butterfly distributed over 8 parallel memory modules. Data and twiddle factor address generation algorithm and store scheme are described detailed. Comparison with conventional methods is also presented.
Keywords :
digital arithmetic; distributed memory systems; fast Fourier transforms; hypercube networks; parallel algorithms; parallel architectures; storage allocation; conflict-free access; data store scheme; fast Fourier transform algorithm; parallel architecture; parallel memory module; twiddle factor address generation algorithm; twin radix-4 butterfly algorithm; FFT; butterfly; parallel;
Conference_Titel :
Information Science and Engineering, 2008. ISISE '08. International Symposium on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-2727-4
DOI :
10.1109/ISISE.2008.108
