Title :
Efficient implementation of packet pre-filtering for scalable analysis of IP traffic on high-speed lines
Author :
Lambruschini, Paolo ; Raggio, Marco ; Bajpai, Rajiv ; Sharma, Abishek
Author_Institution :
Dept. of Naval, Electr., Electron. & Telecommun. Eng. (DITEN), Univ. of Genoa, Genoa, Italy
Abstract :
In this paper an efficient FPGA implementation of a packet pre-filtering algorithm based on Bloom filter is presented. In high speed link the traffic classification involves a very large amount of data per each packet processed. Both header and payload should be analyzed. This leads to use hardware with high computational power and very expensive, in order to support requirement of real-time classification. Our system, reducing the data flow sent to the classifier allows a realtime classification with reduced hardware resources.
Keywords :
IP networks; field programmable gate arrays; telecommunication traffic; Bloom filter; FPGA; IP traffic; high speed link; high-speed lines; packet prefiltering; realtime classification; traffic classification; Classification algorithms; Field programmable gate arrays; Filtering algorithms; Filtering theory; Hardware; IP networks; Intrusion detection; Bloom filter; FPGA; IP traffic analysis; Packet pre-filtering;
Conference_Titel :
Software, Telecommunications and Computer Networks (SoftCOM), 2012 20th International Conference on
Conference_Location :
Split
Print_ISBN :
978-1-4673-2710-7
