Nodal and Spatial Analysis for a Compact Thermal Modeling Methodology

The efforts of integrated circuits technology scaling have been focused on achieving highest performance. However, aggressive scaling leads to a non-uniform temperature distribution across the 1C, which will directly impact its performance and reliability. This paper analyzes and discusses the impacts of spatial temperature distribution at the die-level. A lumped R-C thermal model consists of several nodes with heat dissipation modeled as current sources. A physical interpretation of nodes ensures the correspondence between structural and thermal models. The dependence of a node´s conductive and capacitive parameters on the spatial domain is observed upon performing a node-level analysis. The temperature variations at finer granularities would be different from the overall temperature. This drive to investigate the variation of temperature in the spatial domain yields a relation between the size of the heat source and the peak temperature rise, and this analytical approach can be implemented in any thermal model. We deduce that, for heat sources with larger sizes (i.e. having lower spatial frequencies) the thermal impedance is higher than sources with small dimensions (higher spatial frequencies) whose impedance drops to smaller values due to the presence of AC component in thermal spatial capacitance. This explains the spatial temperature filtering effect.