DocumentCode
2123050
Title
Signal transition graph transformations for initializability
Author
Banerjee, Savita ; Roy, Rabindra K. ; Chakradhar, Srimat T. ; Pradhan, Dhiraj K.
Author_Institution
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fYear
1994
fDate
28 Feb-3 Mar 1994
Firstpage
670
Abstract
We present a method of transforming a functionally uninitializable signal transition graph (STG) into a functionally initializable STG. The design of a trigger module is described to illustrate the transformations
Keywords
asynchronous sequential logic; graph theory; logic design; sequential circuits; trigger circuits; STG transformations; asynchronous circuit design; initializability; signal transition graph; trigger module; Asynchronous circuits; Circuit synthesis; Circuit testing; DH-HEMTs; Logic circuits; Logic testing; National electric code; Signal synthesis; USA Councils; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location
Paris
Print_ISBN
0-8186-5410-4
Type
conf
DOI
10.1109/EDTC.1994.326794
Filename
326794
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