• DocumentCode
    2123177
  • Title

    Implementation of time-domain interleaver based on FPGA in DTTB

  • Author

    Si, Lu ; Chen, Chao

  • Author_Institution
    Eng. Center of Digital Audio & Video, Commun. Univ. of China, Beijing, China
  • fYear
    2012
  • fDate
    21-23 April 2012
  • Firstpage
    3284
  • Lastpage
    3287
  • Abstract
    A FPGA design of time-domain convolutional interleaver in Chinese Digital Television Terrestrial Broadcasting (DTTB) system is proposed. Synchronous Dynamic Random Access Memory (SDRAM) is adopted in the design. Due to the large interleave-width, an overlarge interleaving unit is divided into some sub interleaving units. The result of the simulation is presented. Owing to the burst mode of SDRAM, the processing speed is lifted and the cost is cut down greatly.
  • Keywords
    DRAM chips; digital video broadcasting; field programmable gate arrays; Chinese digital television terrestrial broadcasting system; DTTB; FPGA design; SDRAM; burst mode; processing speed; sub interleaving units; synchronous dynamic random access memory; time-domain convolutional interleaver; Bismuth; Convolution; Convolutional codes; Encoding; Field programmable gate arrays; SDRAM; Time domain analysis; Convolutional Interleaver; DTTB; FPGA; SDRAM;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Consumer Electronics, Communications and Networks (CECNet), 2012 2nd International Conference on
  • Conference_Location
    Yichang
  • Print_ISBN
    978-1-4577-1414-6
  • Type

    conf

  • DOI
    10.1109/CECNet.2012.6201854
  • Filename
    6201854