Title :
An area-efficient IDCT architecture for multiple video standards
Author_Institution :
School Of Information Science And Technology, Zhanjiang Normal University, China
Abstract :
In this paper, we introduce a unified 1-D IDCT architecture for a video decoder supporting multiple standards including AVS, VC-1, MPEG-4 and H.264. The low-cost architecture is implemented by the method of matrix decomposition and sharing resources such as adders and shifters as far as possible. We make use of the coefficients in AVS and VC-1 to reduce the complexity of IDCT based on MPEG-4 greatly. And multipliers are replaced by shifters and adders, which are much more area-efficient. Researching on the relationship of coefficients among AVS, VC-1, and MPEG-4, we propose a low-cost hardware sharing architectures requiring lower hardware cost than that of the individual and separate implementations.
Keywords :
Adders; Computer architecture; Decoding; Matrix decomposition; Standards; Transform coding; Transforms; AVS; H.264; MPEG-4; VC-1; low-cost; multi-standard; sharing resources; unified IDCT;
Conference_Titel :
Information Science and Engineering (ICISE), 2010 2nd International Conference on
Conference_Location :
Hangzhou, China
Print_ISBN :
978-1-4244-7616-9
DOI :
10.1109/ICISE.2010.5690227