Title :
“Underground capacitors”-Very efficient decoupling for high performance UHF signal processing ICs
Author :
Johansson, T. ; Virtanen, L.R. ; Gobbi, J.M.
Author_Institution :
Ericsson Components AB, Kista, Sweden
fDate :
28 Feb-3 Mar 1994
Abstract :
In a modern IC-process, small-value high-quality capacitors can be designed for placement under metal lines using only existing layout layers and no additional processing. These capacitors may be added to each noise generating block to improve decoupling without using additional silicon area or additional processing. We call this trick "Underground capacitors" but it works under any wide metal line. Two types of circuits were fabricated using a 0.8 μm BiCMOS process with three levels of metallization, characterized and compared in the study: a 32/33 prescaler with internal decoupling capacitors and a 64/65 prescaler with no internal decoupling. The bipolar part of the BiCMOS process was used for the circuit design. The dual-modulus prescaler was chosen as a test vehicle because of its importance for frequency synthesis systems
Keywords :
BiCMOS integrated circuits; analogue processing circuits; capacitors; linear integrated circuits; metallisation; scaling circuits; 0.8 μm BiCMOS process; 0.8 mum; 2.8 to 2.9 GHz; 32/33 prescaler; 64/65 prescaler; S/N ratio; UHF signal processing ICs; decoupling improvement; dual-modulus prescaler; efficient decoupling; frequency synthesis systems; internal decoupling capacitors; metal lines; noise generating block; trilevel metallization; underground capacitors; BiCMOS integrated circuits; Capacitors; Circuit noise; Circuit synthesis; Circuit testing; Metallization; Noise generators; Silicon; System testing; Vehicles;
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
DOI :
10.1109/EDTC.1994.326807