Title :
On design rule correct maze routing
Author :
Huijbregts, Ed P. ; Van Eijndhoven, Jos T J ; Jess, Jochen A G
Author_Institution :
Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands
fDate :
28 Feb-3 Mar 1994
Abstract :
This paper addresses the problem of design rule correct routing, i.e. the avoidance of illegal wiring patterns during routing. These illegal wiring patterns are due to the set of design rules accompanying each specific technology. To avoid software tuning for different technologies, the routing space is modelled as a grid graph, and all design rules are described in terms of the grid graph, including rules that describe illegal wiring patterns. The problem of finding valid, (i.e. containing no illegal wiring patterns) minimum cost connections is shown to be NP-complete, even for single nets. Although this restriction occurs in most technologies, literature does not mention any routing algorithm capable of handling these situations correctly. Two heuristics are presented to solve the routing problem, both ensuring all paths found to be valid
Keywords :
circuit layout CAD; computational complexity; graph theory; network routing; network topology; wiring; IC design; NP-complete; design rule correct routing; grid graph; heuristics; illegal wiring patterns; maze routing; minimum cost connections; routing space; Circuits; Costs; Design automation; Fabrication; Routing; Shape; Silicon; Wires; Wiring;
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
DOI :
10.1109/EDTC.1994.326844